NXP Semiconductors /LPC18xx /EVENTROUTER /ENABLE

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Interpret as ENABLE

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (WAKEUP0_EN)WAKEUP0_EN 0 (WAKEUP1_EN)WAKEUP1_EN 0 (WAKEUP2_EN)WAKEUP2_EN 0 (WAKEUP3_EN)WAKEUP3_EN 0 (ATIMER_EN)ATIMER_EN 0 (RTC_EN)RTC_EN 0 (BOD_EN)BOD_EN 0 (WWDT_EN)WWDT_EN 0 (ETH_EN)ETH_EN 0 (USB0_EN)USB0_EN 0 (USB1_EN)USB1_EN 0 (SDMMC_EN)SDMMC_EN 0 (CAN_EN)CAN_EN 0 (TIM2_EN)TIM2_EN 0 (TIM6_EN)TIM6_EN 0 (QEI_EN)QEI_EN 0 (TIM14_EN)TIM14_EN 0RESERVED 0 (RESET_EN)RESET_EN 0 (BODRESET_EN)BODRESET_EN 0 (DPDRESET_EN)DPDRESET_EN 0RESERVED

Description

Event Enable register

Fields

WAKEUP0_EN

A 1 in this bit shows that the WAKEUP0 event has been enabled. This event wakes up the chip and contributes to the event router interrupt when bit 0 = 1 in the STATUS register.

WAKEUP1_EN

A 1 in this bit shows that the WAKEUP1 event has been enabled. This event wakes up the chip and contributes to the event router interrupt when bit 0 = 1 in the STATUS register.

WAKEUP2_EN

A 1 in this bit shows that the WAKEUP2 event has been enabled. This event wakes up the chip and contributes to the event router interrupt when bit 0 = 1 in the STATUS register.

WAKEUP3_EN

A 1 in this bit shows that the WAKEUP3 event has been enabled. This event wakes up the chip and contributes to the event router interrupt when bit 0 = 1 in the STATUS register.

ATIMER_EN

A 1 in this bit shows that the ATIMER event has been enabled. This event wakes up the chip and contributes to the event router interrupt when bit 0 = 1 in the STATUS register.

RTC_EN

A 1 in this bit shows that the RTC event has been enabled. This event wakes up the chip and contributes to the event router interrupt when bit 0 = 1 in the STATUS register.

BOD_EN

A 1 in this bit shows that the BOD event has been enabled. This event wakes up the chip and contributes to the event router interrupt when bit 0 = 1 in the STATUS register.

WWDT_EN

A 1 in this bit shows that the WWDT event has been enabled. This event wakes up the chip and contributes to the event router interrupt when bit 0 = 1 in the STATUS register.

ETH_EN

A 1 in this bit shows that the ETHERNET event has been enabled. This event wakes up the chip and contributes to the event router interrupt when bit 0 = 1 in the STATUS register.

USB0_EN

A 1 in this bit shows that the USB0 event has been enabled. This event wakes up the chip and contributes to the event router interrupt when bit 0 = 1 in the STATUS register.

USB1_EN

A 1 in this bit shows that the USB1 event has been enabled. This event wakes up the chip and contributes to the event router interrupt when bit 0 = 1 in the STATUS register.

SDMMC_EN

A 1 in this bit indicates that the SDMMC event has been enabled. This event wakes up the chip and contributes to the event router interrupt when bit 0 = 1 in the STATUS register.

CAN_EN

A 1 in this bit shows that the CAN event has been enabled. This event wakes up the chip and contributes to the event router interrupt when bit 0 = 1 in the STATUS register.

TIM2_EN

A 1 in this bit shows that the TIM2 event has been enabled. This event wakes up the chip and contributes to the event router interrupt when bit 0 = 1 in the STATUS register.

TIM6_EN

A 1 in this bit shows that the TIM6 event has been enabled. This event wakes up the chip and contributes to the event router interrupt when bit 0 = 1 in the STATUS register.

QEI_EN

A 1 in this bit shows that the QEI event has been enabled. This event wakes up the chip and contributes to the event router interrupt when bit 0 = 1 in the STATUS register.

TIM14_EN

A 1 in this bit shows that the TIM14 event has been enabled. This event wakes up the chip and contributes to the event router interrupt when bit 0 = 1 in the STATUS register.

RESERVED

Reserved

RESET_EN

A 1 in this bit shows that the RESET event has been enabled. This event wakes up the chip and contributes to the event router interrupt when bit 0 = 1 in the STATUS register.

BODRESET_EN

A 1 in this bit indicates that the BOD RESET event has been enabled. This event wakes up the chip and contributes to the event router interrupt when bit 0 = 1 in the STATUS register.

DPDRESET_EN

A 1 in this bit indicates that the deep power-down RESET event has been enabled. This event wakes up the chip and contributes to the event router interrupt when bit 0 = 1 in the STATUS register.

RESERVED

Reserved.

Links

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